//____________________________________________________________________
// 
// Switch the output node passed to this container to be both output
// and input node of the contained modules. 
// 
//  THis container is designed to deal with the problem of the
//  "swiching nodes".  See what happens is that we have to event nodes
//  parallely passed down to all modules, like  
//
//         inNode       outNode
//           |            |
//             V            V
//        +-----------------------+
//        |    BrTileRdoModule    |
//        +-----------------------+
//             |            |
//             V            V
//          inNode       outNode
//             |     (with BrMultRdo)
//             |            |
//             V            V
//        +-----------------------+
//        |   BrMultCentModule    | ====> Chokes. Can't find BrMultRdo
//        +-----------------------+       in inNode
//             |            |
//           inNode      outNode
//             V            V
//        +-----------------------+
//        |     Ohter Modules     |
//        +-----------------------+
//
// So what'd you'd like is for BrMultCentModule to recive the outNode
// of BrTileRdoModule as _both_ it's input and it's output.  That is: 
       
//           inNode       outNode
//             |            |
//             V            V
//        +-----------------------+
//        |    BrTileRdoModule    |
//        +-----------------------+
//                          |
//                          V
//                       outNode
//                  (with BrMultRdo)
//                /        |
//              V          V
//        +-----------------------+
//        |   BrMultCentModule    |
//        +-----------------------+
//             |            |
//           inNode      outNode
//             V            V
//        +-----------------------+
//        |     Ohter Modules     | ====> Chokes. Can't find it's input
//        +-----------------------+
//       
//  However, subsequent modules may want the original inNode (with
//  Digits in), so just duplicating the outNode as inNode won't work
//  (and will cause a memory leak + SIGSEGV).  Therefor I introduced a
//  BrSwitchContainer, that will redirect the previous outNode as in
//  node for the contained modules:  
//
//           inNode       outNode
//             |            |
//             V            V
//        +-----------------------+
//        |    BrTileRdoModule    |
//        +-----------------------+
//             |            |
//             |            V
//             |          outNode
//             |     (with BrMultRdo)
//             |            |
//             V            V
//        +-----------------------+
//        |  BrSwitchContainer    |
//        +-----------------------+
//             |            |
//           inNode      outNode
//             |            |   
//             |            V    V
//             |       +-----------------------+
//             |       |   BrMultCentModule    |  
//             |       +-----------------------+
//             |                /    
//             |               /
//             V              V
//        +-----------------------+
//        |     Ohter Modules     |
//        +-----------------------+
//
//  This quaranties that you'll only duplicate the outNode for one
//  module (you can of course do that as many times as you like), so
//  that subsequent modules get the right inNode.  To use that module,
//  instead of the addition of BrMultCentModule you did above, do  
//
//    BrMultCentModule * multcentModule =
//      new BrMultCentModule("MultCent","Full MULT Cent Module");
//
//    BrSwitchContainer* multcentSwitcher = 
//      new BrSwitchContainer("multcentSwitcher",
//                            "Switcher for MultCent");
//    multcentSwitcher->AddModule(multcentModule);
//    mainModule->AddModule(multcentSwitcher);
//   
//  Please note that I _do_not_ add the BrMultCentModule object to the 
//  main module.  See also GlbPackage referenced above for how I do all
//  that in a package (I add the Br[Tile|Si]CentModule via switchers
//  too). 
//

//____________________________________________________________________
//
// $Id: BrSwitchContainer.cxx,v 1.1 2001/06/22 17:50:41 cholm Exp $
// $Author: cholm $
// $Date: 2001/06/22 17:50:41 $
// $Copyright: (C) 2001 BRAHMS Collaboration <brahmlib@rhic.bnl.gov>
//
#ifndef BRAT_BrSwitchContainer
#include "BrSwitchContainer.h"
#endif
#ifndef ROOT_TDirectory
#include "TDirectory.h"
#endif
#ifndef WIN32
#include <iostream>
#else
#include <iostream.h>
#endif

//____________________________________________________________________
ClassImp(BrSwitchContainer);

//____________________________________________________________________
 BrSwitchContainer::BrSwitchContainer()
{
  // Default constructor. DO NOT USE
  SetState(kSetup);
}
//____________________________________________________________________
 BrSwitchContainer::BrSwitchContainer(const Char_t* name, 
				     const Char_t* title)
  : BrModuleContainer(name, title)
{
  // Named Constructor
  SetState(kSetup);
}

//____________________________________________________________________
 void BrSwitchContainer::Event(BrEventNode* inNode, BrEventNode* outNode)
{
  // Per event method
  SetState(BrModule::kEvent);
  if (DebugLevel() > 10) 
    cout << "In Node is: " << inNode 
	 << " Out Node is: " << outNode << endl;
  BrModuleContainer::Event(outNode, outNode); 
}

//____________________________________________________________________
 void BrSwitchContainer::Print(Option_t* option) const
{
  // Print module information
  // See BrModule::Print for options.
  // In addition this module defines the Option:
  // <fill in here>

  TString opt(option);
  opt.ToLower(); 
  
  BrModuleContainer::Print(option); 
  if (opt.Contains("d")) 
   cout << endl 
         << "  Original author: Christian Holm Christensen" << endl
         << "  Last Modifications: " << endl 
         << "    $Author: cholm $" << endl  
         << "    $Date: 2001/06/22 17:50:41 $"   << endl 
         << "    $Revision: 1.1 $ " << endl  
         << endl 
         << "-------------------------------------------------" << endl;
}

Copyright ; 2002 BRAHMS Collaboration <brahmlib@rcf.rhic.bnl.gov>
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